Assembly Language Instructions Instruction Set Instructions in machine

Assembly Language Instructions Instruction Set Instructions in machine language are in the form of Binary Codes, with each different processor using different codes for an instruction set…. these are supported by its individual hardware. Check out this: http: //www. atkinson. yorku. ca/~sychen/research/LMCHome. html (little computer man = The LMC models a simple von Neumann architecture computer, so it has all of the basic features of a modern computer.

Typical Instruction Set ¡ Data Transfer Move ¡ Subtract Multiply Divide Logical operations And ¡ Move Arithmetic Operations Add ¡ Move Or Not Test and Branch Instructions Unconditional, Conditional, Subroutine Calls, and Returns Shift

Instruction Set ¡ The set of bit patterns that represent all the possible operations for a given processor

Why use an instruction set at all? 10101010101 1001010101010101 Or MOVE LDA STA

Why use an instruction set at all? ¡ ¡ Cos binary representation of machine instructions is tedious…for the programmer. In assembly language the operations codes and addresses are represented by abbreviations called mnemonics

Mnemonics ¡ ¡ Typically two. three. or four character mnemonics are used for all machine code instructions. Assembler The ______ translates a program written in Mnemonics (assembly language) into machine code.

Data Transfer Instructions ¡ You need data transfer instructions to do stuff like ¡ -move data from memory to a register or Move data from a register to register Register to memory Register to output unit Data from output unit to register ¡ ¡

Eggzamples Move R 1, R 2 LDA #32 STA X Answers here Move Contents of Register R 2 to R 1 Load the number 32 into the accumulator Store Contents of the accumulator in memory location X

Arithmetic Instructions ¡ Some microprocessors offer only addition and subtraction…. as basic arithmetic operations. Others offer a more comprehensive set such as; ADC Addition SBC Subtraction INC Increment DEC Decrement MPY Multiply DIV Division NEG Sign Change ABS Absolute Value

Addition and subtraction or division or whatever is always a little more complex than you would like ¡ ¡ You may have a zero as an answer Or a negative number Or you may have a carry involved Or an overflow…. . ¡ STATUS REGISTER in some processors have 4 little bits that are especially designed to deal with these things happening. ¡ N Z V and C

4 bits which are ‘set’ to 1 0 r 0 depending on the result of the PREVIOUS operations Status Register N Z V C ¡ If result is Negative ¡ If result is Zero Z=1 ¡ If overflow occurred V=1 ¡ If Carry occurred C=1 N=1 These four bits are called STATUS BITS or CONDITION CODES

Conditional Branch instructions ¡ ¡ BEQ –Branch if ZERo They check the status of the relevant status bit (also called a flag) and branch accordingly.

Carry and Overflow ¡ ¡ In a microprocessor using 8 -bit registers –the range of integers that can be held in one register is from -129 to 127 Why is this? WHAT HAPPENS IF THE RESULT OF THE ARITHMETIC FALLS OUTSIDE THIS RANGE. i. e more than 8 bits is required?

8 bits ¡ ¡ -128 to 127 (256 bits) 1111 If the result is more than that range. . the overflow bit is set to 1, otherwise it is set to ‘ 0’.

How it looks 0100 0000 (64) 0100 0001 (65 1000 0001 (-127) N Z V C 11 0 0 1 0 ?

In a microprocessor using 8 -bit registers, the range of integers that can be held in one register is from -128 to 127. ¡ If the arithmetic op falls outside that range, the V bit (overflow) is going to be set to 1! 0100 0000 (64) 0100 0001 (65) _______ 1000 0001 (-127) N Z V C 0 0 1 0 Explanation: First of all, we know that 64+65 is equal to 129. Why does it add up to -127? We also know that 129 is outside of the acceptable range. One way of Looking at it is visualising a CYCLIC Range. If the range stops at 127, and the result Is +2, then it would go on to -127. See Illustration

Adding to large negative numbers would cause both the overflow bit and the carry bit to be set. 1100 0000 (-64) ¡ 1011 1111 (-65) ________ (1)0111 1111 (+127) ¡ N 0 Z 0 V 1 C 1

In some situations the carry bit will be set and the overflow bit will not be set. 1111 (-1) 1111 1110 (-1) _______ (1) 1111 1110 (-2) N Z V C 0 1 1 1 ?

In some situations the carry bit will be set and the overflow bit will not be set. 1111 (-1) 1111 1110 (-1) _______ (1) 1111 1110 (-2) N Z V C 1 0 0 1 Here, -2 is the correct answer

Carry bits, Overflow bits –what do they do? The overflow bit warns that the sign Of the result has been accidentally Changed and action must be taken. The carry bit indicates that a ninth bit Has beet set and action may or may Not be needed.

Logical Instructions ¡ INPUTS The instructions OR, NOT, AND, and EOR (exclusive OR) have the following effects: A B RESULT OR NOT AND EOR 1010 1100 _____ 1110 1010 1100 ____ 1000 1010 1100 ____ 0110 ____ 0101 Note: the NOT function can be used to find the two’s complement of a number So if A is NOT A would be the two’s complement no. 0110 0111 1001 Not A! Stop at the first 1, and then Reverse all the bits!

What does this Assembly Language Instruction do? ! LDA # 01100111 B ¡ NOTA ¡ ADC #1 ¡

Ans: It performs the NOT A function! (conversion to 2’s complement) LDA # 01100111 B Load binary number into accumulator Complement the number in the accumulator ¡ NOTA ¡ ADC #1 Add one to the accumulator ¡ WHY ADD 1? Because when you convert into two’s complement (the whole Reversal of bits etc) what you are really doing is reversing all the bits Then adding one!

Correct working out of conversion to 2’s complement A 0110 0111 Not A 1001 1000 Add 1 1 2’s Comp 1001 Easier way to do it is to simply stop at the first 1 you see from Right to left. Leave that one as it is, and then from then on Reverse all the bits. You get the same thing, and it’s a little quicker!

But for the purpose of knowing how it’s done (or visualise the process inside the processor) remember the add 1 LDA # 01100111 B Load binary number into accumulator Complement the number in the accumulator ¡ NOTA ¡ ADC #1 Add one to the accumulator ¡ WHY ADD 1? Because when you convert into two’s complement (the whole Reversal of bits etc) what you are really doing is reversing all the bits Then adding one!

Logical Instructions OR ¡ NOT ¡ AND ¡ EOR (exclusive OR) ¡

The OR function…this can be used to set certain bits to 1 without affecting the other bits in the binary code. ¡ Example? ¡ A system may have eight lights that can be turned on (output 1) or off (output 0), controlled by an 8 -bit binary code. At present, lights 1 to 4 are on. We also want now to turn on lights 5 and 7… 8 Bit Binary code To control 8 lights Lights 1 2 3 4 5 6 7 8

How could we represent that? Light Numbers Present Output OR with Result 1 2 3 4 5 6 7 8 1 1 0 0 0 0 1 0 ______ 1 1 1 0 Assembly language code for this operation would be LDA LIGHT ORA #1010 B STA LIGHT Load contents of LIGHT into accumulator Or Operation with binary 1010 Store result back in LIGHT

AND function ¡ ¡ Used for masking out certain bits of a number. For example, if we input the ASCII character 3 at the keyboard, the ASCII pattern 0011 is input. In order to change this to a pure binary number, we need to mask out the first 4 bits. 0011 ASCI Code (3) But Pure Binary 3 =0011

EOR Function ¡ ¡ ¡ Used to check if two words are identical: EOR #99 ; is the contents of the accumulator equal to 99? BZR label 1 ; branch to label 1 if equal

Test & Conditional Branches ¡ These instructions may test the flags in the status register; typical instructions and their mnemonic codes (6502) are ‘Branch of the last result was zero’ –BEQ, Branch if carry flat set’, BCS’ Branch on result not zero’ –BNE, ‘Branch on result positive’ –BPL, ‘branch on overflow set’ -BVS

Compare instructions ¡ ¡ May be used to compare the contents of a memory location with the contents of a register. If contents of the memory location and the register are equal, the zero flag in the status register is set to 1 and may be tested

EXAMPLE ¡ Write assembly code instructions branch to LBL 1 if the contents of the ACC is equal to zero. ¡ Solution ¡ CMP #- ; compare contents of ACC with zero ¡ BEQ LBL 1 ; branch if they are equal to LBL 1

Unconditional Branches ¡ http: //en. wikipedia. org/wiki/Branch _table