AIDA Update presented by Tom Davinson on behalf
AIDA Update presented by Tom Davinson on behalf of the AIDA collaboration (Edinburgh – Liverpool – STFC DL & RAL) Tom Davinson School of Physics & Astronomy The University of Edinburgh
AIDA: Introduction Advanced Implantation Detector Array (AIDA) UK collaboration: University of Edinburgh, University of Liverpool, STFC Daresbury Laboratory & STFC Rutherford Appleton Laboratory • Super. FRS • Exotic nuclei ~ 50 – 200 Me. V/u • Implant – decay correlations • Multi-Ge. V implantation events • Subsequent low-energy decays • Tag events for gamma and neutron detector arrays Detector: multi-plane Si DSSD array wafer thickness 1 mm 8 cm x 8 cm (128 x 128 strips) or 24 cm x 8 cm (384 x 128 strips) Instrumentation: ASIC low noise (<12 ke. V FWHM), low threshold (0. 25% FSR) 20 Ge. V FSR plus ( 20 Me. V FSR or 1 Ge. V FSR) fast overload recovery (~ms) spectroscopy performance time-stamping
AIDA Hardware Mezzanine: 4 x 16 channel ASICs Cu cover EMI/RFI/light screen cooling FEE width: 8 cm Prototype – air cooling Production – recirculating coolant FEE: 4 x 16 -bit ADC MUX readout (not visible) 8 x octal 50 MSPS 14 -bit ADCs Xilinx Virtex 5 FPGA Power. PC 40 x CPU core/Linux OS – DAQ Gbit ethernet, clock, JTAG ports Power
AIDA Mechanical • Mechanical design for 8 cm x 8 cm and 24 cm x 8 cm DSSSDs is complete • Evaluate performance of 8 cm x 8 cm design before proceeding to manufacture of 24 cm x 8 cm design • Design compatible with BELEN, TAS, MONSTER , RISING, FATIMA etc. - Design drawings (PDF) available http: //www. eng. dl. ac. uk/secure/np-work/AIDA/
AIDA: status • DSSSD with sub-contractor (MSL) - 8 cm x 8 cm & 24 x 8 cm mechanical samples & prototypes delivered - production batch (#2) in progress • Production hardware (ASIC, FEE Mezzanine PCB, FEE PCB) delivered by sub-contractors • FEE 64 Mezzanine assembly - c. 37 complete - 40 queued • FEE 64 PCB - 50 tested OK - 17 partly tested - 7 with faults requiring further tests • FEE module assembly - 12 complete - 6. 5 tested OK - 20 queued
AIDA: status • MACB timestamp distribution system for FEE modules - delivery complete • Mechanical design and infrastructure (HV, PSUs, cooling etc. ) - detector HV, FEE PSUs, cooling & FEE crates delivered - support assembly University of Liverpool workshop due end-Feb 2012
AIDA: outlook • AIDA production hardware was available for commissioning on schedule in 2011/Q 3 • Performance of 20 Ge. V & 1 Ge. V ranges meets specification - need to optimise DSSSD-FEE coupling for 20 Me. V range - progress very encouraging • Basic data merge with MBS successfully demonstrated during AIDA+LYCCA test May 2011 - further work required • Continuing FEE firmware development work in progress - DSP (digital CFD etc) • DAQ software development work in progress - interface migtated from Tcl/Tk to XML/SOAP (web-based) - control and management of multiple FEE modules - timestamp-ordered data merge (GREAT format) Bottom line – AIDA is ready and needs to be scheduled on FRS
AIDA Plans
Acknowledgements My thanks to: STFC DL P. Coleman-Smith, M. Kogimtzis, I. Lazarus, S. Letts, P. Morrall, V. Pucknell, J. Simpson & J. Strachan STFC RAL D. Braga, M. Prydderch & S. Thomas University of Liverpool T. Grahn, P. Nolan, R. Page, S. Ritta-Antila & D. Seddon University of Edinburgh Z. Liu, G. Lotay & P. Woods University of Brighton O. Roberts GSI F. Amek, L. Cortes, J. Gerl, E. Merchan, S. Pietri et al.
AIDA: Project Partners • The University of Edinburgh (lead RO) Phil Woods et al. • The University of Liverpool Rob Page et al. • STFC DL & RAL John Simpson et al. Project Manager: Tom Davinson Further information: http: //www. ph. ed. ac. uk/~td/AIDA Technical Specification: http: //www. ph. ed. ac. uk/~td/AIDA/Design/AIDA_Draft_Technical_Specification_v 1. pdf
FEE Assembly Sequence
Bench Tests of Prototype Hardware Tests with pulser demonstrating integral non-linearity and noise performance of 20 Me. V range INL < 0. 1% ( > 95% FSR ) 0. 15 m. V rms ~ 2. 5 ke. V rms Si
Tests with AIDAProduction Hardware • Realistic input loading CD ~ 60 p. F, IL ~ 60 n. A • Expectation ~12 ke. V FWHM
GSI Commissioning Test – August 2011 • SIS 250 Me. V/u 209 Bi • Beam delivery direct to HTC • From exit port + ~1. 0 m air + ~2 mm Al (degrader) + ~0. 9 m air + 1 x MSL type W-1000 DSSSD cheap alternative to type BB 18 … • Test of response of 20 Ge. V range • No rejection of lighter, lower energy ions generated by passage of beam through exit port/degrader
Event Multiplicity
High Energy Implantation Events • Significant ballistic deficit effects • Confirms Bardelli model and previous TAMU observations • Implies preamp risetime for high energy heavy-ions >500 ns (cf. intrinsic preamp risetime ~90 ns)
Implant Decay Correlations y-scale 1 ms/channel x-scale 4 ke. V/channel decay time = txy(decay)-txy(implant) Expect random correlations only
E(p+n) – E(n+n) + offset – decay events
E(p+n strips) versus E(n+n strips) - decay events
E(p+n strips) versus E(n+n strips) – implant events
8 cm x 8 cm AIDA Enclosure
GSI Commissioning Test – August 2011: setup 1 x MSL type W(DS)-1000 bias -150 V leakage current ~0. 8 u. A 16 x p+n junction strips (horizontal) 16 x n+n ohmic strips (vertical) strip size ~50 mm x 3 mm, thickness 1 mm Edinburgh MSL type W – AIDA mezzanine adaptor PCB ac coupling ~10 n. F / strip test capacitance ~1 p. F / strip bias resistor ~10 M / strip Detector connected to ASICs #3 & #4 Events defined as all ADC data within 8 us time window decay events – events containing no HEC data (i. e. LEC data only) implant events – any events containing HEC data (i. e. may contain LEC data)
MSL type BB 18
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