ADMS Compact Model Synthesis PART I Introduction and

ADMS: Compact Model Synthesis PART I: Introduction and development outlook Laurent Lemaitre Ben Gu 9/10/2021 Freescale - Geneva Freescale - Austin 1

Outline of Presentation • • Device Models in CAD tools Device Model Implementation – hand-crafted ADMS: software tool - translates Verilog-AMS to C Overview of the Device Model Generator Example of Model Generation Ngspice Interface Work on progress Conclusion

Device Models in CAD tool Electrical Circuit Simulator Spectre, ADS, Mica, . . Spice netlists + Process libraries (model parameters) DESIGNER Simulation Results done manually or use model compiler (ADMS) Built-in Device Model Equations VBIC, EKV, SP, MOSCAP, R 3, . .

Model Implementation Hand-crafted • Device Model Engineer: provides equations of new model to programmer. No standard. • Programmer: hand-codes the model in source code of the electrical circuit simulator (most of the time the language is C). No standard. • C code must comply with the Simulator Programming Interface. Much coding needs to be done again for each simulator. • C code involves the manual computation and coding of partial derivatives. This process is tedious and error-prone. • C code is hard to read. Feedback to the Device Model Engineer is made difficult. • The process is a barrier to model maintenance and enhancement.

ADMS Approach • • • ADMS translates Verilog-AMS to ready-to-compile C code for simulator API (application programming interface) ADMS uses Verilog-AMS as input. Advantages of Verilog-AMS: • • • Verilog-AMS code easy to read - no extra code specific to simulators. Model can be easily and completely tested prior implementation ! ADMS uses XML (successor of HTML ) as internal language to build the translators from Verilog-AMS to Simulator API: • Simplifies development of new features of ADMS and support of multiple simulators

ADMS Translator STANDARD 1: AT MODEL LEVEL Verilog-AMS Model Code Parsing XML program Code Generator Testing prior implementation DTD based validation C code Mica, Spectre, ADS, … Internal data STANDARD 2: AT SIMULATOR LEVEL Other applications Documentation Circuit Test benches

Example – Verilog-AMS I `define NPN +1 `define PNP – 1 module BIP (c, b, e); // Nodes input c, b; // input nodes output e; // output nodes electrical c, b, e; // all electrical // Branches branch (b, c) bc; branch (c, e) ce; branch (e, c) ec; branch (b, e) be;

Example – Verilog-AMS II // Parameters parameter real parameter real parameter integer // Variables real Tdev, Vtv; real Ifi, Ibf; real Iri, Ibr; real argf, expf; is = 1. 0 e-16; bf = 100; br = 1; nf = 1. 0; nr = 1. 0; type = `NPN;

Example – Verilog-AMS III analog begin // Analog section Tdev = $temperature; Vtv = 1. 380662 e-23 * Tdev / 1. 602189 e-19; if ( type == `NPN ) begin argf = V(be) / ( nf * Vtv ); end else if ( type == `PNP ) begin. . . expf = exp(argf); Ifi = is *(expf-1. 0); Ibf = Ifi/bf; begin I(ce) <+ Ifi; // FORWARD Transport C-E I(be) <+ Ibf; // FORWARD Diode B-E end

Example – Code for Spectre BIPOLAR TRANSISTOR in VERILOGAMS Run adms. Spectre SPECTREinterface. h BIPdefs. h BIPinit. Parameter. c BIPload. Jacobian. c BIPevaluate. Static. c BIPevaluate. Dynamic. c Ready-to-compile C code

Example – Test-bench Circuit • Automatically Generated by ADMS 1 k. Ohm 1 V 1 V 1 k. Ohm Bint Cint Eint 1 Ohm

Example – Comparisons spectre DC Analysis `op. Point' Operating at T = 27 C. V(Bint) = 650. 428 m. V V(Cint) = 921. 346 m. V V(Eint) = 79. 0034 m. V I(vb: p) = -349. 572 u. A I(vc: p) = -78. 6538 m. A Power Dissipation = 79. 0 m. W Ads © Agilent Technologies. DC Operating Point: V(Bint) = 650. 428 m. V V(Cint) = 921. 346 m. V V(Eint) = 79. 0034 m. V vb. i = -349. 572 u. A vc. i = -78. 6538 m. A -----------

NGSPICE support • Motivation: standardization effort • Link to home page: http: //ngspice. sourceforge. net/adms. html • How to: http: //ngspice. sourceforge. net/admshowto. html# • ADMS distribution in ngspice: • ADMS is distributed separately from ngspice. You can download the ADMS compiler from it's web site. Once you have downloaded and installed the compiler, you can add Verilog-AMS model to ngspice. • The process of adding a new device is far from being automatic and need a certain knowledge of spice internals. The file README. adms distributed with ngspice describes the process. • Plan: update the XML interface by Q 4 -2006: integrate the latest versions of psp, hicum and mextram.

Work in Progress • ADMS is written in the C language • Current release 2. 2. 4 • Next release 2. 2. 5 planned by end of October • documentation • stronger XML parsers • faster (5 X) • ADMS is open-source: mot-adms. sourceforge. net • Port to free. BSD (July 2006)

Work in Progress • Working with Agilent to provide a free MINT interface: • end 2006 • Cadence provides support through CMI • Helene Parruit (ENSIB) writes the QUCS XML interface • Mentor Graphics is currently its XML interface for ADMS • The PSP family used ADMS to release its simkit version • Simucad who uses ADMS to implement some of its models.

Conclusion • ADMS = automatic implementation of compact models into circuit simulators • ADMS automatically generates efficient, robust, correct -by-construction code (bsim 3 same speed as hand-crafted reported in 2 cases) • ADMS has been successfully used for the integration of new device models into Mica, Spectre, HSIM and ADS • Compact models are defined by Verilog-AMS, a standard high-level language