Accelerator Architecture in Computational Biology and Bioinformatics February

Accelerator Architecture in Computational Biology and Bioinformatics, February 24 th, 2018, Vienna, Austria Exploring Speed/Accuracy Trade -offs in Hardware Accelerated Pre. Alignment in Genome Analysis Mohammed Alser, Hasan Hassan, Akash Kumar, Onur Mutlu, and Can Alkan Bilkent University, TU Dresden, ETH Zürich

Executive Summary n n Problem: There is a significant performance gap between high-throughput DNA sequencers and read mapper. Observations: Inaccuracy of state-of-the-art prealignment filters leads to high computational burden. Goal: Identify and mitigate the sources of inaccuracy in state-of-the-art filters. Key Results: A pre-alignment filter is beneficial if the filter: q Is at least 2 x faster than the alignment. q Can reject at least 80% of incorrect mappings. 2

WHAT MAKES READ MAPPER SLOW? 3

What makes Read Mapper SLOW? Key Observation # 1 90% SAM printing 3% candidate alignment locations (CAL) 4% of the read mapper’s execution time is spent in read alignment. Read Verification [PERCENTAGE] Alser et al, Bioinformatics (2017)

What makes Read Mapper SLOW? (cont’d) Key Observation # 2 98% of candidate locations have high dissimilarity with a given read. Cheng et al, BMC bioinformatics (2015) Xin et al, BMC genomics (2013)

What makes Read Mapper SLOW? (cont’d) Key Observation # 3 Quadratic-time dynamicprogramming algorithms. et c n n n Data dependencies limits the computation parallelism. Computing the entire matrix all the time for all mappings. etc

CAN WE DO BETTER? 7

Proposed Strategy Compute the alignment for only similar sequences Highly parallel matrix computation Highly accurate filtering algorithm 8

1 - Align Only Similar Sequences 9

The Effect of Pre-Alignment Filter+ Alignment 12, 000 10, 000 Total processing time without pre-alignment (sec) Total processing time with pre-alignment (sec) Ideal processing time for 90% pre-alignment rejection percentage assuming alignment processes 100 Mappings/sec 8, 000 Pre-alignment saves more than 6, 000 40% to 80% 4, 000 2, 000 of the total processing time Target 0 100% 80% 60% 40% 20% 100% 80% 60% 40% 20% Processing time (sec) for 1 million mappings 14, 000 2 x 4 x 8 x 16 x 32 x 64 x 128 x 256 x Pre-alignment rejected mapping percentage and speed compared to alignment step 10

2 - Highly Parallel Matrix Computation 8 matches 0 mismatches I S T A N B U L 11

2 - Highly Parallel Matrix Computation (cont’d) 8 matches 0 mismatches I S T A N B U L 12

2 - Highly Parallel Matrix Computation (cont’d) 3 matches 5 mismatches I S T A N B U L I S T N B U L To cancel the effect of deletion, we need to shift to right direction 13

2 - Highly Parallel Matrix Computation (cont’d) 7 matches 1 mismatches I S T A N B U L I S T N B U L 14

2 - Highly Parallel Matrix Computation (cont’d) Reference 2 Deletion masks Query We need to compute 2 E+1 vectors, E=edit distance threshold dp[i][j]= 0 if X[i]=Y[j] 1 if X[i]≠Y[j] No data dependencies! 2 Insertion masks 15

3 - Highly accurate filtering algorithm n n Pigeonhole principle: if E items are put into E+1 boxes, then one or more boxes would be empty. I S T A N B U L I S T N B U L Our aim is to find these E+1 segments quickly. I S T N B U L 16

3 - Highly accurate filtering algorithm (cont’d) MAGNET n Not much of matches in the first mask 17

3 - Highly accurate filtering algorithm (cont’d) MAGNET n Now divide the problem into two subproblems and repeat 18

3 - Highly accurate filtering algorithm (cont’d) MAGNET n 19 Counting the encapsulation bits reveals the number if edits

MAGNET Accelerator 20

VC 709 Resource Utilization Edit Distance Threshold 2 5 MAGNET 1 core Gate. Keeper 1 core Slice LUT Slice Register 10. 5% 37. 8% 0. 86% 2. 3% 0. 39% 0. 71% 0. 01% MAGNET 8 cores, 2 cores Gate. Keeper 16 cores Slice LUT Slice Register 85% 83% 7% 6% 32% 45% 2% 2% 21

False Accept Rate MAGNET is 7 x - 105 x less false accept rate 22

True Reject Rate MAGNET rejects 87% - 99% incorrect mappings 23

Alignment vs Pre-Alignment Speedup Work Platform MAGNET FPGA (Virtex 7) Gate. Keeper [17] FPGA (Virtex 7) SHD [4] Intel SSE Myers’s algorithm [12] Intel SSE [13] Smith-Waterman [4] Intel SSE Smith-Waterman [16] FPGA (Virtex 4) Smith-Waterman [16] GPU Smith-Waterman [15] GPU Mappings #/ 1 sec 37, 500, 000 1, 665, 811, 051 18, 820, 572 2, 146, 266 201, 783 (128 bp) 689, 543 (128 bp) 86, 192 4, 000 § MAGNET requires 2 x less time than SHD and 44 x more time than Gate. Keeper. § MAGNET is 17 x faster than the accelerated implementation [13] of Myers’s algorithm [12]). 24

Speed/Accuracy Trade-offs (end-toend) Filter+ Total processing time without pre-alignment (sec) Alignment 12, 000 10, 000 Total processing time with pre-alignment (sec) Ideal processing time for 90% pre-alignment rejection percentage assuming alignment processes 100 Mappings/sec 8, 000 6, 000 MAGNET Gate. Keeper 4, 000 2, 000 Target 0 100% 80% 60% 40% 20% 100% 80% 60% 40% 20% Processing time (sec) for 1 million mappings 14, 000 2 x 4 x 8 x 16 x 32 x 64 x 128 x 256 x Pre-alignment rejected mapping percentage and speed compared to alignment step 25

Conclusion n n We introduce, MAGNET, fast and accurate FPGA prealignment filter. Adding pre-alignment filter to genome analysis is beneficial if the filter is at least 2 x faster than the alignment and able to reject at least 80% of incorrect mappings. FPGAs will likely continue to be the best acceleration platform for computational genomics Aluru et al. , IEEE Design & Test, (2014). Integrating the FPGA accelerators with the sequencer can help to hide the complexity and details of the underlying hardware. 26

Acknowledgements n ALKAN Lab q q n SAFARI Lab q q n Can Alkan Mohamme Alser Onur Mutlu Hasan Hassan Cf. AED center q Akash Kumar

Accelerator Architecture in Computational Biology and Bioinformatics, February 24 th, 2018, Vienna, Austria Exploring Speed/Accuracy Trade -offs in Hardware Accelerated Pre. Alignment in Genome Analysis Mohammed Alser, Hasan Hassan, Akash Kumar, Onur Mutlu, and Can Alkan Bilkent University, TU Dresden, ETH Zürich