A FPGABased Architecture for InFlight Synthetic Aperture Radar

A FPGA-Based Architecture for In-Flight Synthetic Aperture Radar (SAR) Motion Compensation in Unmanned Aerial Vehicles Fernando Ortiz EM Photonics, Inc. Newark, DE

Outline • • • Introduction & Motivation SAR Reconstruction Basics Motion Compensation The Hardware Platform Architecture for Real-time SAR Motion Compensation • Conclusion and Future Work Ortiz 2 MAPLD 2005/1009

SAR Concept • Radar waves used to visualize objects because of their ability to penetrate a range of materials • Resolution of image improves as aperture size increases • Unfortunately, increasing aperture size (antenna length) may simply be impractical (antenna lengths in kilometers) Goal: gain the advantages of a large aperture radar by using a smaller, traveling aperture Ortiz 3 MAPLD 2005/1009

SAR Applications Target Detection and Tracking Buried Object Detection Ocean Floor Topography Air Traffic Control Mining/Space Exploration Medical Imaging Ortiz 4 MAPLD 2005/1009

Motion Compensation • Problem: cannot guarantee perfect motion paths Without Compensation • Result: degraded images • Solution: motion compensation Complexity of motion compensation is limiting factor in deploying SAR systems! • Options for aerial platforms: With Compensation – Massive onboard computers – Slower processing (secs per frame) – Ground processing Ortiz 5 MAPLD 2005/1009

Motivation How does this impact in-flight systems? Space-Based • Disregard motion compensation (for stable orbits) • Ground processing practical Airborne • Simple motion compensation • Power/area available for calculations X UAV • Advanced motion compensation (erratic path, wind interaction) • Minimal power/area for processing UAVs require fast, low area/power motion compensation solvers Solution: reconfigurable platforms! Ortiz 6 MAPLD 2005/1009

SAR Geometry z Goal Determine x, y, s for each target range How? • Range Imaging • Cross Range Imaging yn (cross-range domain) Imaged Region xn x Ortiz y Reflective targets 7 MAPLD 2005/1009

SAR Basics: Range Imaging Yc p(t) s 1 s 2 s 3 s 4 s 1 p(t-2 x 1/c) s 2 p(t-2 x 2/c) s 3 p(t-2 x 3/c) s 4 p(t-2 x 4/c) x 1 x 2 x 3 x 4 Received signal Combines Range and Reflectivity Matched Filter Desired information s 1 Ortiz x 1 s 4 s 2 x 2 8 s 3 x 4 MAPLD 2005/1009

SAR Basics: Cross-Range Imaging • Use matched filtering (again) to determine cross-range information • Put these two together and you have a 2 D imaging system y 3 y 2 y 1 Xc Typical SAR problem Received Signal Fourier Transform (t, u) Inverse Transform (w, ku) (kx, ky) (x, y) Output Image 2 D Matched Filter Ortiz FFTs are the bottleneck in traditional SAR 9 MAPLD 2005/1009

MC SAR Processing Flow Received Signal Motion Compensation is the NEW Bottleneck SAR Filter FFT SAR Filter Motion Compensation Filter MC Filter IFFT Reconstructed Image Ortiz Reconfigurable platform permits massive parallelization and pipelining 10 MAPLD 2005/1009

Hardware Platform Custom, FPGA-based PCI Card Xilinx Virtex-II 8000 FPGA 36 Mb DDR SRAM PCI 64/66 Interface Ortiz PLX 9656 (External PCI Control) 16 GB DDR SDRAM 11 MAPLD 2005/1009

Platform Success Millions of nodes/sec (Mnps) Platform used to develop accelerated solvers for electromagnetic simulations. Performance vs. Problem Size 35 30 EM Photonics Celerity Platform 25 20 15 PC cluster, 30 nodes 10 5 Single PC Key Statistics 0 • 9. 5 GB/s Main Memory Bandwidth 0 • 150+ Floating-Point Units @ 133 MHz Ortiz 12 50 100 150 Nodes (Millions) 200 MAPLD 2005/1009

SAR Motion Compensation Architecture Norm kx ky x y U Round BRAM xe LUT ye LUT Norm Out Norm REG yn xn Cos qc Sin qc Ortiz 13 MAPLD 2005/1009

Resource Utilization Total Quantity LUTs Mults FPADD 10 4880 0 FPMUL 10 189 3 1890 30 FPDIV 1 573 0 FPSQRT 3 573 0 1719 0 FPEXP 1 11128 8 Total 20190 38 % of XC 2 V 8000 21. 67 26. 39 Three parallel SAR MCUs are feasible within a single chip Ortiz 14 MAPLD 2005/1009

Conclusion and Future Work • SAR Motion Compensation requires significant computing power For the future: • This solves only one piece • Demonstrated FPGA platform capable of in-flight SAR MC • – FFTs – Interface • RC platforms ideal fit for UAV applications – Comm. Bandwidth savings – Airborne processing enables further applications (e. g. ATR) – Low weight/power – Hardware reusable for other tasks Ortiz 15 Form factor has to be converted – Less memory – No PCI – Interface with the rest of the system – Integrate cooling into the airframe MAPLD 2005/1009