80386 Instruction Set Agenda Data Movement Instructions Binary

80386 Instruction Set

Agenda • • • Data Movement Instructions Binary Arithmetic Instructions 11 Decimal Arithmetic Instructions Logical Instructions Control Transfer Instructions String and Character translation Instructions for Block-Structured Languages Flag Control Instructions Coprocessor Interface Instructions Segment Register Instructions Miscellaneous Instructions 2/12/2022 ©PCCOE&R, Ravet, Pune 2

Data Movement Instructions • Provides convenient methods for moving bytes, words or doublewords of data • Various Classes – General purpose data movement instructions – Stack manipulation instructions – Type-conversion instructions 2/12/2022 ©PCCOE&R, Ravet, Pune 3

General Purpose data movement instructions • MOV (Move): Transfers a byte, word or doubleword from the source operand to the destination operand • Operand options – – – To a register from memory To memory from a register Between general registers Immediate data to a register Immediate data to a memory • Memory to Memory and Segment register to segment register, not allowed • MOVS: string manipulation instruction for memory to memory moves • Example: MOV EAX, EBX ; Moves contents of EBX to EAX 2/12/2022 ©PCCOE&R, Ravet, Pune 4

• XCHG (Exchange): Swaps the contents of two byte or word or doubleword operands • Operands may be two registers or a register with memory • This instructions takes the place of three MOV instructions • Does not require temporary location to save the contents of one operand while the other is being loaded • Used for implementing semaphores or similar data structures for process synchronization 2/12/2022 ©PCCOE&R, Ravet, Pune 5

Stack manipulation Instructions • • PUSHA POPA 2/12/2022 ©PCCOE&R, Ravet, Pune 6

Type Conversion Instructions • Converts bytes to words, words to doublewords and doublewords to 64 -bit items • Specially useful for converting signed integers • Two classes: – The forms CBW, CWD, CDQ and CWDE (Operates on EAX) – MOVSX and MOVZX (One register operand other may be register or memory) 2/12/2022 ©PCCOE&R, Ravet, Pune 7

• CBW: (Convert byte to word) AL AX • CWD: (Convert word to doubleword) AX DX: AX • CDQ: (Convert doubleword to quadword) EAX EDX: EAX • CWDE: (Convert word to doubleword extended) AX EAX • MOVSX: (Move with sign extension) sign-extends an 8 -bit to 16 -bits and 8 - or 16 - bit value to 32 - bit value • MOVZX: (Move with zero extension) zero-extended 2/12/2022 ©PCCOE&R, Ravet, Pune 8

Binary Arithmetic Instructions • Addition and subtraction instructions – ADD (Add integers) – ADC (Add integers with carry) – INC (Increment) – SUB (Subtract integers) – SBB (Subtract integers with borrow) – DEC (Decrement) • Comparison and Sign change – CMP (Compare) – NEG (Negate) subtract from zero 2/12/2022 ©PCCOE&R, Ravet, Pune 9

• Multiplication Instructions: – MUL (Unsigned Integer multiply) Source (Multiplier) Accumulator (Multiplicand) Result (Product) [Double-length] 8 -bit AL AX 16 -bit AX DX: AX 32 -bit EAX EDX: EAX – IMUL (Signed Integer multiply) • Three variations: One-, two- and three- operand form 2/12/2022 ©PCCOE&R, Ravet, Pune 10

• Division Instructions: – DIV (Unsigned Integer division) Size of Source Dividend operand (Divisor) Result (Quotient) Result (Remainder) 8 -bit AX AL AH 16 -bit DX: AX AX DX 32 -bit EDX: EAX EDX – IDIV (Signed Integer division) • Same register combinations 2/12/2022 ©PCCOE&R, Ravet, Pune 11

Decimal Arithmetic Instructions • Decimal arithmetic is performed in combination with binary arithmetic instructions – To adjust the results of a previous binary arithmetic operation to produce a valid packed or unpacked decimal result – To adjust the input to a subsequent binary arithmetic operation so that the operation will produce a valid packed or unpacked decimal result 2/12/2022 ©PCCOE&R, Ravet, Pune 12

• Packed BCD Adjustment instructions – DAA (Decimal adjust after addition) – DAS (Decimal adjust after subtraction) • Unpacked BCD Adjustment instructions – AAA (ASCII Adjust after Addition) – AAS (ASCII Adjust after Subtraction) – AAM (ASCII Adjust after Multiplication) – AAD (ASCII Adjust before division) 2/12/2022 ©PCCOE&R, Ravet, Pune 13

Logical Instructions • • • The Boolean operation instructions Bit test and modify instructions Bit scan instructions Rotate and shift instructions Byte set on condition 2/12/2022 ©PCCOE&R, Ravet, Pune 14

• Boolean operation instructions – NOT: – AND: – OR: – XOR: 2/12/2022 ©PCCOE&R, Ravet, Pune 15

• Bit test and modify instructions: – Operates on single bit within the operand (Register or Memory) – Bit location is specified as an offset from loworder end of the operand Instruction Effect on CF Effect on Selected Bit BT (Bit test) CF BIT (none) BTS (Bit test and Set) CF BIT 1 BTR (Bit test and Reset) CF BIT 0 BTC (Bit test and Complement) CF BIT NOT (BIT) 2/12/2022 ©PCCOE&R, Ravet, Pune 16

• Bit Scan Instructions: scan a word or doubleword for a one-bit and store the index of the first set bit into a register • ZF is set if entire operand is zero – BSF (Bit Scan Forward) – BSR (Bit Scan Reverse) 2/12/2022 ©PCCOE&R, Ravet, Pune 17

• Shift and Rotate Instructions – Shift instructions • • SAL (Shift Arithmetic Left) SHL (Shift Logical Left) SHR (Shift Logical Right) SAR (Shift Arithmetic Right) – Double shift instructions • SHLD (Shift Left Double) • SHRD (Shift Right Double) – Rotate instructions • ROL, ROR, RCL, RCR 2/12/2022 ©PCCOE&R, Ravet, Pune 18

• Byte set on Condition instructions – Sets a byte to Zero or One depending on any of the 16 conditions defined by the status flags – SETcc (Set byte on condition cc) • Test Instructions: – TEST (Test) performs the logical “and” 2/12/2022 ©PCCOE&R, Ravet, Pune 19

Control Transfer Instructions • Unconditional transfer Instructions (Near and Far) – JMP (Jump)- one way transfer of execution – CALL (Call procedure) – RET (Return from procedure) – IRET (Return from interrupt) 2/12/2022 ©PCCOE&R, Ravet, Pune 20

• Conditional transfer instructions – Conditional jump instructions 2/12/2022 ©PCCOE&R, Ravet, Pune 21

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– Loop Instructions: (before testing the condition/s it decrements ECX) • LOOP (Loop while ECX not zero) • LOOPE (Loop while equal) and LOOPZ (Loop while zero) • LOOPNE (Loop while not equal) and LOOPNZ (Loop while not zero) – Executing a Loop or Repeat zero times • JCXZ (Jump if ECX zero) • Software generated interrupts – INT n (Software interrupt) – INTO (Interrupt on Overflow) – BOUND (Detect value out of range) 2/12/2022 ©PCCOE&R, Ravet, Pune 23

String and Character translation instructions • Set of primitive string instructions (Operand B/W/D) – MOVS: Move string – CMPS: Compare string – SCAS: Scan string – LODS: Load string – STOS: Store string • Indirect, indexed addressing with autoincrementing/decrementing index – Indexes: ESI & EDI – Control flag: DF – Control flag instruction: CLD and STD 2/12/2022 ©PCCOE&R, Ravet, Pune 24

• Repeat prefixes – REP: repeat while ECX not zero – REPE / REPX: repeat while equal or zero – REPNE / REPNZ: repeat while not equal or not zero 2/12/2022 ©PCCOE&R, Ravet, Pune 25

Instructions for Block-Structured Languages • To provide machine-language support for functions normally found in high-level languages – ENTER (Enter Procedure) – Leave (Leave procedure) 2/12/2022 ©PCCOE&R, Ravet, Pune 26

Flag Control Instructions • Carry and Direction Flag control instructions 2/12/2022 ©PCCOE&R, Ravet, Pune 27

• Flag transfer instructions – LAHF (Load AH from Flags) – SAHF (Store AH into Flags) – PUSHF (Push flags) – POPF (Pop flags) 2/12/2022 ©PCCOE&R, Ravet, Pune 28

• Segment-register transfer instructions – MOV – POP – PUSH • Far control transfer instructions – Direct far JMP – Indirect far JMP – Far CALL – Far RET 2/12/2022 ©PCCOE&R, Ravet, Pune 29

• Data pointer instructions – LDS (Load pointer using DS) – LES (Load pointer using ES) – LFS (Load pointer using FS) – LGS (Load pointer using GS) – LSS (Load pointer using SS) 2/12/2022 ©PCCOE&R, Ravet, Pune 30

Miscellaneous Instructions • Address calculation instruction – LEA (Load effective address) • No-operation instruction – NOP (No operation) • Translate instruction – XLAT 2/12/2022 ©PCCOE&R, Ravet, Pune 31