7 Ch Prof Seewhy Lee Presents 2 fulladder
- Slides: 132
7. Ch 조합논리회로 Prof. Seewhy Lee Presents
2. 전가산기(full-adder, FA) § 자리 올림수(carry)를 고려하여 만든 덧셈 회로 Cin A + B Cout S 0 0 + 0 0 0 1 0 + 0 0 1 입력 0 1 + 0 0 1 1 1 + 0 1 0 0 0 + 1 0 1 출력 A B Cin S Cout 0 0 1 1 0 1 0 1 0 1 1 0 0 0 1 1 1 <진리표와 논리식> 1 0 + 1 1 0 0 1 + 1 1 0 1 1 + 1 1 1
Subtractor
Half Subtractor
Full Subtractor
<BCD 덧셈표> 2진 합 K 0 0 0 0 1 1 Z 8 0 0 0 0 1 1 1 1 0 0 Z 4 0 0 0 0 1 1 1 1 0 0 BCD 합 Z 2 0 0 1 1 0 0 1 1 Z 1 0 1 0 1 0 1 C 0 0 0 0 0 1 1 1 1 1 S 8 0 0 0 0 1 1 S 4 0 0 0 0 1 1 1 1 0 0 S 2 0 0 1 1 0 0 S 1 0 1 0 1 0 1 10진값 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
§ 2비트 비교기 입력 A A 1 A 2 0 0 0 1 1 B B 1 B 2 0 0 0 1 1 0 1 1 A=B F 1 1 0 0 0 0 1 출력 A≠B A>B F 2 F 3 0 0 1 0 1 1 0 0 1 1 1 1 0 0 A<B F 4 0 1 1 1 0 0 0 1 0 0 <진리표>
CPU RAM Slow Cache Fast
입력 A 3, B 3 A 2, B 2 A 1, B 1 A 0, B 0 A 3>B 3 A 3<B 3 A 3=B 3 A 3=B 3 A 3=B 3 A 3=B 3 × × A 2>B 2 A 2<B 2 A 2=B 2 A 2=B 2 A 2=B 2 × × A 1>B 1 A 1<B 1 A 1=B 1 A 1=B 1 A 1=B 1 × × × A 0>B 0 A 0<B 0 A 0=B 0 A 0=B 0 출력 AGBO ALBO AGBI ALBI AEBI A>B A<B × × × 1 0 × × × 0 1 1 0 0 1 0 0 0 1 1 0 0 1 1 1 0 0 0 0 1 1 <4비트 비교기 IC 7485 진리표> AEBO A=B 0 0 0 0 0 1 1 0 0
* AGBO : A Greater than B Output * ALBO : A Less than B Output * AEBO : A Equal B Output <IC 7485 크기 비교기 회로>
4. 4× 16 디코더 D C B A 0 0 0 0 1 1 0 0 0 1 0 1 1 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 0 1 1 Y 15 Y 14 Y 13 Y 12 Y 11 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 Y 10 Y 9 Y 8 Y 7 Y 6 Y 5 Y 4 Y 3 Y 2 Y 1 Y 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 <4× 16 디코더 진리표>
BCD/Decimal Decoder
§ IC 74154 <IC 74154 회로도>
§ 2× 4 디코더 5개를 이용한 4× 16 디코 더 D C B A 0 0 0 0 1 1 0 0 0 1 0 1 1 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 0 1 1 Y 15 Y 14 Y 13 Y 12 Y 11 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 Y 10 Y 9 Y 8 Y 7 Y 6 Y 5 Y 4 Y 3 Y 2 Y 1 Y 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 <4× 16 디코더 진리표>
3
2. 2 십진 계수기 (Decade Counter)
7447
2. 3 BCD-to-FND Decoder
3. 실험 장비 및 부품 실험장비 직류전원공급기 (5 V) 1대 디지털 오실로스코프 1대(프로브 2개) 신호발생기 1대 IC (decade counter) IC(BCD-to-7 -segment decoder) 저항 부품 LED 74 LS 90 1개 74 LS 47 1개 220[Ω] 2개 Red (or yellow, green) 7 segment display Common Anode (FND) type 4개 1개
<7447 진리표> 10진값 또는 기능 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 1 1 1 × × × × × 1 0 입력 출력 D 0 0 0 0 1 1 1 1 C 0 0 0 0 1 1 1 1 B 0 0 1 1 A 0 1 0 1 × × × 0 0 0 × × × 1 1 1 1 1 0 0 0 1 1 1 0 0 0 1 1 1 1 0 0 0 0 0 1 1 1 0 1 0 0 1 1 0 1 0 1 1 0 1 1 1 0 0 0 1 1 0 0 0 0 1 1 0 0 0 1 1 1 1 × × 1 0 0 0 0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 <7447의 LED 점등 패턴도>
§ 4× 1 멀티플렉서 5개를 이용한 16× 1 멀티플 렉서 S 3 S 2 S 1 S 0=0000~0011 : MUX #1 enable S 3 S 2 S 1 S 0=0100~0111 : MUX #2 enable 16개 입력 S 3 S 2 S 1 S 0=1000~1011 : MUX #3 enable S 3 S 2 S 1 S 0=1100~1111 : MUX #4 enable 4개 선택선
PSpice
PSpice 00 A 01 B 10 C 11 D
<IC 74280 회로도>
Thanks for your attention~!! Prof. Seewhy Lee
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