3 Phase Wave Generation 3 Phase waveform generation
- Slides: 20
3 Phase Wave Generation 3 Phase waveform generation using Timer/Counter 1 and 3 on atmega 128
Topics ► Sinusoidal Wave Generation Theory ► Atmega 128 setup and considerations ► Results
3 Phase line to line voltages ► u. C used to control switch states ► +E or 0 is shown to the load on each phase § Depends on if upper or lower switch is on
3 Phase line to line voltages ► 2/3 on switching scheme used ► Allowing switches to be off for 1/3 of the time reduces switching power losses ► Line to neutral voltages are not sinusoidal, but line to line are!!! *U, V, W are the desired line to neutral voltages
Topics ► Sinusoidal Wave Generation Theory ► Atmega 128 ► Results setup and considerations
u. C Sinusoidal PWM ► Line to neutral voltages approximated using PWM switching ► Average output voltage controlled by duty cycle ► u. C duty cycle = OCRn. A: C/Top ► Top and pre-scaler are set so switching frequency is at 20 k. Hz
Lookup Table Generation ► Using Excel duty cycle of was approximated ► One cycle broken up into 192 steps ► Sin(2*PI*i/192), i = 0. . 191 ► OCRn. A: C = Round(Sin(2*PI*i/192)*TOP) ► TOP value is 400 for my 20 k. Hz switching frequency ► Looking up values frees up u. C for other tasks
sine Look-Up Table sin(2*PI*i/192) i i 0 -63 64 -127 128 -191 Round(U*TOP)
Sin lookup table array const uint 16_t sin_lookup[192*3] = { //OCRn. A, OCRn. B, OCRn. C 0, 346, 13, 0, 353, 26, 0, 359, 39, 0, 364, 52, 0, 370, 65, 0, 374, 78, 0, 379, … … }
Timer/Counter 1/3 Setup ► Phase & Frequency correct PWM ► Dual Slope Operation ► Used to control switches § Timer/Counter 1 Upper Switches § Timer/Counter 3 Lower Switches ► Timer/Counter 3 switches inverse of Timer/Counter 1 ► Output bit is set or cleared on compare match
Timer/Counter 2 ► Updates Timer/Counter 1/3 OCRn. A, OCRn. B, OCRn. C to control duty cycle ► Counter variable incremented by 3 every time Timer/Counter 2 interrupts ► OCRn. A: C value generated from lookup table § OCRn. A = sin_lookup[counter] § OCRn. B = sin_lookup[counter+1] § OCRn. C = sin_lookup[counter+2] ► Interrupts second occur fdesired*192 times per
My epiphany + ≈ + • One output port of u. C looks like one switching stage • Switches between 0 and Vcc • Upper and Lower switches never on at same time (no shoot-thru) • Using OCR 1 A: C of one Timer/Counter 1 and the counters three output pins a three phase waveform can be generated • **Bonus** I don’t have to buy anything to implement the design
Viewing Wave forms RC filters and Resistive loads were used to view the waveforms Port. B. 5 Port. B. 6 Port. B. 7
Topics Sinusoidal Wave Generation Theory ► Atmega 128 setup and considerations ► ► Results
Results Waveform growth
Results A B A-B C
Shoot Thru If S+ and S- on at same time the circuit would short
Shoot Thru To avoid shoot-thru add a switching delay Amount to increment or decrement by depends on switching frequency OCR 1 A = OCRA-1 (cleared sooner) OCR 3 A = OCRA+1 (set later)
Other Considerations Make sure TCCR 1 and TCCR 3 are synchronous Using SFIOR Stop pre-scalers (stop the clocks) Set TCCR 1 and TCCR 3 to zero Restart prescalers Setting TSM, asserts a reset signal to PSR 0 and PSR 321. Upon clearing TSM PSR 0 and PSR 321 are set to zero and timers/counters begin counting synchronously
References Generate advanced PWM signals using 8 -bit m. Cs Michael Copeland, Infineon http: //www. edn. com/article/CA 52686. html AP 16097: Different PWM Waveforms Generation for 3 -Phase AC Induction Motor with XC 164 CS Infineon http: //www. infineon. com/cms/en/product/channel. html? channel=ff 80808112 ab 681 d 0112 ab 6 b 2 dfc 0756 AVR 447: Sinusoidal driving of three-phase permanent magnet motor using ATmega 48/88/168 AVR 494: AC Induction Motor Control Using the constant V/f Principle and a Natural PWM Algorithm AVR http: //www. atmel. com/products/AVR/mc/? family_id=607
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