240 208 Fundamental of Computer Architecture November 01

240 -208 Fundamental of Computer Architecture November 01, 2003 By Panyayot Chaikan panyayot@coe. psu. ac. th

Chapter 4 ระบบหนวยความจำ The Memory System 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 2

Connection of the memory to the CPU 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 4

Organization of bit cells in a memory chip From Figure 5. 2 Page 296 of “Computer Organization”, Carl Hamacher, 5 th edition, Mc. Graw Hill pub. 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 5

Organization of a 1 Kx 1 memory chip From Figure 5. 3 Page 297 of “Computer Organization”, Carl Hamacher, 5 th edition, Mc. Graw Hill pub. 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 6

Semiconductor Memories u Nonvolatile memory u Volatile memory u. ROM u. SRAM u. PROM u. DRAM u. EPROM u. EEPROM u. Flash memory u. Asynchronous u DRAM u FPM DRAM u. Synchronous u SDRAM u DDR SDRAM u RDRAM 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 7

ROM u. ROM : Read Only Memory u. Programmed when manufacturing is in process. u. PROM : Programmable Read Only Memory u. Programmable by user only once u. Flexible and convenient compared to ROM u. Programmed by burning the fuse using high current pulse 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 8

A simple 4 -word ROM From Figure 11 -12 Page 298 of “Microprocessors: principles and applications”, Charles M. Gilmore, Mc. Graw Hill pub. 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 9

A simple 4 -word ROM using MOS From Figure 11 -13 Page 299 of “Microprocessors: principles and applications”, Charles M. Gilmore, Mc. Graw Hill pub. 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 10

EEPROM u. Electrically Erasable PROM u. No requirement of physically removed from the circuit for reprogramming u. Use special voltage level to erase data u. Any cell contents can be delete selectively 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 11

EPROM u. Reprogrammable u. Erased by UV light u. Example EPROM chips u 27 C 64 : 8 KB u 27 C 128 : 16 KB u 27 C 256 : 32 KB u 27 C 512 : 64 KB 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 12

EPROM 2764, 27128, 27256 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 13

Flash Memory u. Electrically erasable u. Single cell can be read but can be written only an entire block of cells. u. Prior to writing, the previous of the block are erased. u. Suitable for used as solid state disk such as Compact. Flash, Memory. Stick, SD, MD etc. 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 14

SRAM cell 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 15

DRAM cell 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 16

SRAM VS DRAM SRAM u Very fast u Very Expensive u Used in Cache memory and CPU register 240 -208 Fundamental of Computer Architecture DRAM u Slower than SRAM u Cheaper than SRAM u Used in most computer as main memory u Need to be refreshed periodically Chapter 4 - The Memory System 17

DRAM: Multiplexed Row-Column addressing 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 18

DRAM: Multiplexed Row-Column addressing u. Reducing Address pins of IC chip u. RAS = Row Address Strobe u. CAS = Column Address Strobe 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 19

Static RAM u 2 Kx 8 240 -208 Fundamental of Computer Architecture u 8 Kx 8 Chapter 4 - The Memory System 20

Dynamic RAM chip: Example 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 21

Memory Module From www. oamao. com/Matos/ ordi/guide. htm 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 22

3 Types of RAM modules FROM http: //www. buycomputermemory. com/computer-memory-types-and-memory-technology. html 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 23

Internal organization of a 2 Mx 8 DRAM From Figure 5. 7 Page 300 of “Computer Organization”, Carl Hamacher, 5 th edition, Mc. Graw Hill pub. 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 24

SDRAM u. Synchronous DRAM u. Need clock signal for synchronize operation u. Can be used with clock speed 100 and 133 MHz u. Built in refresh circuitry 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 25

Structure of Synchronous DRAM From Figure 5. 8 Page 302 of “Computer Organization”, Carl Hamacher, 5 th edition, Mc. Graw Hill pub. 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 26

Burst read of length 4 in an SDRAM Row Col D 0 From Figure 5. 9 Page 303 of “Computer Organization”, Carl Hamacher, 5 th edition, Mc. Graw Hill pub. 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 27

The use of Memory controller 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 28

The role of Memory controller u. Is the North-bridge chip in typical PC u. Activate/Deactivate signal RAS and CAS timing for DRAM u. Interposed between Processor and Memory u. Refresh DRAM if required 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 29

Memory organization in typical PC From http: //www. via. com. tw/en/p 4 -series/pt 800. jsp 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 30

Memory organization in typical PC From http: //www. via. com. tw/en/p 4 -series/pt 880. jsp 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 31

Memory hierarchy 240 -208 Fundamental of Computer Architecture Chapter 4 - The Memory System 32

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