11 Digital Design ENGR 3410 Computer Architecture Mark

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11 Digital Design ENGR 3410 – Computer Architecture Mark L. Chang Fall 2006

11 Digital Design ENGR 3410 – Computer Architecture Mark L. Chang Fall 2006

Combinational Logic Design Process • Understand the Problem – what is the circuit supposed

Combinational Logic Design Process • Understand the Problem – what is the circuit supposed to do? – write down inputs (data, control) and outputs – draw block diagram or other picture • Formulate the Problem in terms of a truth table or other suitable design representation – truth table, Boolean algebra, etc. • Choose Implementation Target – PAL, PLA, Mux, Decoder, Discrete Gates • Follow Implementation Procedure – K-maps, Boolean algebra, algorithmic simplification 59

Process Line Control Example • Statement of the Problem – Rods of varying length

Process Line Control Example • Statement of the Problem – Rods of varying length (+/-10%) travel on conveyor belt – Mechanical arm pushes rods within spec (+/-5%) to one side – Second arm pushes rods too long to other side – Rods too short stay on belt – 3 light barriers (light source + photocell) as sensors – Design combinational logic to activate the arms • Understanding the Problem – Inputs are three sensors, outputs are two arm control signals – Assume sensor reads "1" when tripped, "0" otherwise – Call sensors A, B, C • Draw a picture! 60

Process Line Control Example (cont. ) Where to place the light sensors A, B,

Process Line Control Example (cont. ) Where to place the light sensors A, B, and C to distinguish among the three cases? Assume that A detects the leading edge of the rod on the conveyor 61

Process Line Control Example (cont. ) A to B distance place apart at specification

Process Line Control Example (cont. ) A to B distance place apart at specification - 5% A to C distance placed apart at specification +5% 62

Process Line Control Example (cont. ) 63

Process Line Control Example (cont. ) 63

Combinational vs. Sequential Logic X 1 X 2 Xn- Logic Network - Z 1

Combinational vs. Sequential Logic X 1 X 2 Xn- Logic Network - Z 1 Z 2 Network implemented from logic gates. The presence of feedback distinguishes between sequential and combinational networks. Zm Combinational logic no feedback among inputs and outputs are a pure function of the inputs e. g. , seat belt light: (Dbelt, Passenger) mapped into (Light) Driver_belt Passenger Logic Circuit Seat Belt Light 64

Circuit Timing Behavior • Simple model: gates react after fixed delay A B A

Circuit Timing Behavior • Simple model: gates react after fixed delay A B A 0 B 1 C 0 D C E F 1 D E F 65

Hazards/Glitches • Circuit can temporarily go to incorrect states Copilot Autopilot Request A B

Hazards/Glitches • Circuit can temporarily go to incorrect states Copilot Autopilot Request A B Autopilot Engaged Pilot in Charge? Pilot Autopilot Request C CAR PIC PAR A B C AE • Must filter out temporary states 66

Safe Sequential Circuits • Clocked elements on feedback, perhaps outputs – Clock signal synchronizes

Safe Sequential Circuits • Clocked elements on feedback, perhaps outputs – Clock signal synchronizes operation – Clocked elements hide glitches/hazards X 1 X 2 Xn - Logic Network - Z 1 Z 2 Zm Clock Data Compute Valid Compute 67